The production process of IC card

Release time:2025-09-15 09:26:38

The IC card production process can be divided into the following steps: from design to issuance, the IC card can be summarized as follows: design the card chip (or consider designing a universal chip) based on the application system's requirements for card functionality and security, and propose specific requirements for the MPU, memory capacity, and COS of the smart card according to the process level and cost, or propose specific requirements for the logical function and storage area allocation of the logical encryption card.
Card integrationcircuit design
The design process is similar to that of ASIC (Application Specific Integrated Circuit), including logic design, logic simulationcircuit designCircuit simulation, layout design, and correctness verification can be completed using computer-aided design tools such as Workview, Mentor, or Cadence.
For smart cards, industrial standard microprocessors are often used as the core in foreign countries to adjust the type and capacity of memory without the need for redesign. A more feasible approach is to have COS designed domestically and chips produced by foreign semiconductor manufacturers. For reliability reasons, these chips should have self-protection capabilities.
Software design (only applicable to smart cards)
Including the design of COS and application software, there are corresponding development tools available for selection. Due to the security of smart cards being related to COS, smart cards used in important economic and confidential sectors of the country should be included in China's self-designed COS. Making circuits on monocrystalline silicon wafers
The designer submits the designed layout or COS code to the chip manufacturer. The manufacturing plant produces multi-layer mask plates according to the requirements of design and process. Hundreds to thousands of independent circuits can be made on a single wafer, each circuit being a small chip. In addition to the pressure welding blocks designed according to the IC card standard (8 contacts), there should also be probe pressure blocks specifically for testing on the small piece, but attention should be paid to whether these pressure blocks will give attackers an opportunity.
Test and write information in E2PROM
Use a computer with a testing program to control the probe and test each chip on the wafer. Mark defective chips and write manufacturer codes and other information into chips that pass testing. If the user needs the manufacturer to write content in E2PROM, it can also be done at this time.
The transport code can also be written at this time. The transport code is a defensive measure taken to prevent cards from being stolen during transportation from the manufacturer to the issuer, and is a password known only to the manufacturer and issuer. After receiving the card, the issuer must first verify the shipping code. If the verification is incorrect, the card will lock automatically and burn the fuse. First check the shipping code. If it is a logical encryption card, the transport code can be written into the user password area by the manufacturer, and after the issuer verifies the correctness, it can be rewritten into the user password. For smart cards, operations such as writing passwords, keys, and creating files can be performed at this time.
After the operation is completed, burn the fuse. Afterwards, the card enters user mode and can never return to its previous working mode, in order to ensure the security of the card. Electrically erasable typeProgrammable Read Only MemoryElectrically Erasable Programmable Read Only Memory is the core of IC card technology. This technology increases transistor density, improves performance, increases capacity, and achieves the goal of storing larger amounts of data on the same area. As a storage space for data or programs, EEPROM data can be retained for at least 10 years with over 100000 erasures. EEPROM technology also provides great flexibility by setting immutable flag bits to transform EEPROM cells intoProgrammable Read Only MemoryRead only memory or unreadable confidential storage unit.
The progressiveness of this technology makes the IC card with secure memory get rapid development and application. For example, in various toll systems (such as public telephones, electricity meters, road tolls, etc.) andaccess controlIt has been widely applied in various fields. CPU cards with EEPROM as the core are also widely used inmobile phoneBanking departments, multi application cards, and high security application fields that require public key algorithms.RFIDRFID (Radio Frequency Identification) technology is an identification method that uses electromagnetic waves for signal transmission. The identified object itself should have devices for receiving and transmitting electromagnetic waves.RFID systemThe communication frequency range used is in the range of<135kHz or>300MHz~GHz.
RFIDIC card is an IC card that uses electromagnetic waves and non-contact to communicate with terminals. When using this card, there is no need to insert it into a specific reader\/writer slot. Generally speaking, the communication distance ranges from a few centimeters to 1 meter.RFIDCards are widely used and have great potential for development.
RFID IC cards can be classified into active and passive types. Active card refers to the card that needs to actively approach the card reader, and the user needs to read the card information in the card reading area of the card reader to complete the transaction; Passive cards do not require presenting the card, as long as they pass through the range of the card reader, they can read the information on the card and complete the transaction. The CPU card in the IC card adopts special encryption technology, which not only verifies the correctness of information, but also checks the legitimacy of the identities of both communication parties, thereby ensuring the security of information transmission. This is achieved through mutual verification between the bank key stored in the IC card and the bank key stored in the black box of the card reader, ensuring that both the cardholder and the card reader have legal identities. In short, after adopting advanced encryption technology, it not only has high security and rigor, but also has advantages such as flexibility, convenience, and low cost.
In addition to the aforementioned technologies, there are also Java card technology, IC card ISO standardization technology, IC card biometric authentication technology, and moreData compression technologyWaiting for new software and hardware technologies.IC card readerTo be able to read and write IC cards that comply with the ISO7816 standard. The IC card interface circuit serves as the only channel for communication between the IC card and the CPU within the IFD. To ensure the safety and reliability of communication and data exchange, the electrical signals generated by it must meet strict timing requirements.
Timing requirements
The IC card interface circuit has strict timing requirements for the recognition of IC card insertion and exit, namely the activation and release of the card. If the corresponding requirements cannot be met, the IC card cannot operate normally; In severe cases, it may damage the IC card orIC card reader.
(1) Activation process
To initiate the operation of the card, the interface circuit should activate the circuit in the order shown in Figure 1:
RST is in the L state;
◇ Depending on the selected card type, power up VCC to Class A or Class B,
VPP rises to idle state;
The I\/O of the interface circuit should be placed in the receiving state;
Provide clock signals to the CLK of the IC card (1-5MHz for A-class cards and 1-4MHz for B-class cards).
At t’ Add a clock signal to the CLK of the IC card at time a. The I\/O circuit should be connected to 200 clock signals applied to CLKClock cycle(ta) is placed in a high resistance state Z (ta time at t’); After a). After applying the clock to CLK, keep RST in state L for at least 400 cycles (tb) to reset the card (tb at t’); After a). At time t’ b. RST is placed in state H. The I\/O should allow for 400 to 40000 signals after the rising edge of the RST signalClock cycleStarting within (tc) (tc at t’); After b).
When RST is in state H, if the response signal is 40000Clock cycleIf the process has not yet started, the signal on RST will return to state L, and the IC card interface circuit will release the IC card.
(2) Release process
When the information exchange ends or fails (such as no card response or card being removed), the interface circuit should release the circuit according to the timing shown in Figure 2:
RST should be set to state L;
CLK should be set to state L (unless the clock has stopped in state L);
VPP should be released (if it has been activated);
I\/O should be set to state A (not specifically defined within time td);
VCC should be released.
power supply voltage
The IC card interface circuit should be able to provide stable current to the IC card within the voltage range specified in Table 1.
clock signal
The IC card interface circuit provides clock signals to the card. The actual frequency range of the clock signal during the reset response period should be within the following range: for A-class cards, the clock should be between 1-5 MHz; B-class card, the clock should be between 1-4MHz.
After reset, the F in the received ATR (reset response) signal（clock frequencyDetermine the transformation factor and bit rate adjustment factor (D).
The working cycle of the clock signal should be 40% to 60% of the period during stable operation. When switching frequency from one value to another, care should be taken to ensure that there are no pulses shorter than 40% of the short period.
driver module
(1) Determination of data structure
Edit the header file ICDATA. H to determine the common data structure to be applied in the driver module program. The ultimate goal of the driver module is to read and write card data for processing, so a standardized and neat data structure is necessary. A data structure can be defined to implement the storage area, data address index, control flag bits, etc. of card data, as shown in the diagram on the right:
In this way, only STruct ICDATA iccdata is needed in the driver module; One statement can define all the card processing data structure definitions; And Ic_fops defines the structure of device operation mapping function. From this data structure, we have implemented functions for opening, reading, writing, and monitoring IC card devices.
(2) Hardware interface control line control subfunction
One of the hardware control interface operation functions, taking the developed hardware system platform as an example, is used to control the reset signal of the IC card. The internal operation methods of functions vary for different hardware platforms. Similar other operation functions include: module initialization function is an essential processing function in the module development process, used to implement device initialization, interrupt initialization and processing, device registration, etc. In the above function, Initicdata is first applied to initialize the card data, and then queue data is defined. Further bound the interrupt handling function, applied for interrupts, and initialized interrupts. Finally, the application for an IC card character device was implemented, named IC.